Overview
In addition to component selection and circuit design, good Printed Circuit Board (PCB) design plays a crucial role in electromagnetic compatibility (EMC). The key to PCB EMC design is minimizing the loop area and directing the return paths as intended. Common issues with return currents arise from cracks in reference planes, switching reference plane layers, and signals passing through connectors. While bypassing or decoupling capacitors may resolve some issues, the overall impedance of capacitors, vias, pads, and routing must be considered. This article discusses EMC PCB design techniques, including layering strategy, layout tips, and routing rules.
PCB Layering Strategy
In PCB design, the thickness, via process, and number of board layers are not keys to solving problems. Instead, good layer stacking ensures bypass and decoupling of the power bus, minimizes transient voltages on power or ground layers, and shields the electromagnetic fields of signals and power. For signals, an effective layering strategy places all signal routings on one or several layers close to a power layer or ground layer. For power, the strategy involves adjacent power and ground layers with minimal distance between them, which is referred to as the “layering” strategy. The following points detail a good PCB layering strategy:
- The projection plane of a routing layer should be within its return plane layer area. If the routing layer is outside its return plane layer area, signals will project outside this area, leading to “edge radiation” issues and increasing the area of the signal loop, thus increasing differential mode radiation.
- Avoid adjacent routing layers, as parallel signal lines on adjacent layers can cause signal crosstalk. If adjacent layers cannot be avoided, increase the distance between these layers while decreasing the distance between the routing layer and its signal loop.
- Adjacent plane layers should avoid overlapping projection planes. Overlapping can cause layer-to-layer capacitive coupling, leading to noise coupling between layers.
Multilayer Board Design
When designing multilayer Printed Circuit Boards (PCBs) for signals with clock frequencies above 5 MHz or signal rise times less than 5 ns, controlling the signal loop area effectively is crucial. Here are several key principles to consider for multilayer board design to enhance electromagnetic compatibility (EMC) and signal integrity:
Key Routing Layers
- Placement Strategy: Key routing layers, such as those for clock lines, buses, interface signal lines, RF lines, reset signal lines, chip-select lines, and various control signal lines, should be adjacent to a complete ground plane. Ideally, these should be sandwiched between two ground planes, as shown in Figure 1.
- Benefits: Key signal lines are often either highly emissive or susceptible. Placing these lines close to a ground plane helps to minimize their loop area, thereby reducing radiation intensity and enhancing their immunity to interference.
Power Plane Design
- Indentation of Power Planes: The power plane should be indented relative to its adjacent ground plane (with a recommended indentation of 5H to 20H). This design approach helps effectively suppress edge radiation issues, as depicted in Figure 2.
- Optimal Placement: Additionally, the main operational power plane, which is the most commonly used, should be closely adjacent to its ground plane. This close proximity significantly reduces the loop area for the power current, which is critical in minimizing electromagnetic interference (EMI), as illustrated in Figure 3.
Signal Routing on Top and Bottom Layers
- Signal Frequency Considerations: Ensure that there are no signal lines with frequencies ≥50 MHz on the TOP or BOTTOM layers. If such high-frequency signals are present, it is preferable to route them between two plane layers to suppress their radiation into the surrounding space.
- Implementation: Routing high-frequency signals between plane layers can shield these signals from external interference and reduce their potential to emit noise, thereby improving the overall EMC performance of the PCB.
By following these design principles, you can effectively manage EMC challenges in multilayer PCBs. Such strategies are crucial for maintaining the functionality and reliability of the circuits, especially in environments where noise sensitivity and emissions could affect performance. These guidelines ensure that the multilayer PCB design not only meets technical specifications but also complies with EMC requirements, ensuring the device operates reliably in its intended application.
Single-layer and Double-layer Board Design
When designing single-layer and double-layer Printed Circuit Boards (PCBs), particular attention must be paid to the layout of key signal lines and power lines. It is crucial to ensure that ground lines are placed close and parallel to the power lines to reduce the loop area of the power current. Here are specific strategies for handling signal lines in single-layer and double-layer boards:
Single-Layer Boards
- Guide Ground Lines: For single-layer boards, placing “Guide Ground Lines” on both sides of key signal lines to minimize the signal loop area is advisable. This setup is shown in Figure 4.
- Purpose: These ground lines serve as a shield to reduce electromagnetic interference by keeping the loop area small. Additionally, they help prevent crosstalk between the key signal lines and other nearby signal lines.
Double-Layer Boards
- Large Ground Planes: On double-layer boards, key signal lines should have a large area of ground laid out on their projection plane, similar to the approach used in single-layer boards. This can involve designing “Guide Ground Lines,” as illustrated in Figure 5.
- Protection Ground Lines: Ground lines on both sides of the key signal lines reduce the signal loop area and act as a barrier against interference from other signal lines.
General Considerations
- Overall Design Strategy: The layering of PCBs should be planned according to a well-thought-out scheme that optimizes electromagnetic compatibility and signal integrity. This planning involves strategically placing ground planes, carefully routing power and signal lines, and using decoupling techniques to manage interference and crosstalk.
By following these guidelines, designers can reduce noise and enhance the performance of single- and double-layer PCBs. These strategies are vital for ensuring that the PCBs function reliably under various electrical conditions and meet the required standards for electromagnetic compatibility.
PCB Layout Techniques
When designing the layout for Printed Circuit Boards (PCBs), it’s essential to follow certain principles to ensure signal integrity and minimize interference between components and circuits. Here’s a comprehensive guide to practical PCB layout:
Clean Ground Interface
- Principle: If a “clean ground” interface is designed on the board, filtering and isolation devices should be placed in the isolation band between the “clean ground” and the working ground. This placement prevents coupling through the plane layers, which can weaken the effectiveness of filtering or isolation devices. Additionally, no other devices should be placed on the “clean ground” besides filtering and protection devices.
Separation of Circuit Modules
- Principle: On a PCB with multiple modules, digital and analog circuits, as well as high-speed and low-speed circuits, should be laid out separately to prevent interference. Furthermore, when high, medium, and low-speed circuits coexist on a board, high-frequency circuit noise should be controlled according to layout principles shown in Figure 7 to prevent radiation through interfaces.
Placement of Filtering Circuits
- Principle: Filtering circuits at the board’s power input should be placed close to the interface to avoid coupling that can occur after the line has been filtered.
Interface Circuit Design
- Principle: Filtering, protection, and isolation devices should be located near the interface, as shown in Figure 9, to effectively implement protection, filtering, and isolation. If both filtering and protection circuits are present at an interface, the ‘protection first, then filtering’ principle should be followed. This is because protection circuits are designed to suppress external overvoltage and overcurrent, which can damage filtering circuits if placed downstream. Additionally, to prevent weakening the effects of filtering, isolation, or protection, ensure that the input and output lines of the filtering (filter), isolation, and protection circuits do not couple with each other.
Sensitive Circuits
- Principle: Sensitive circuits or devices, such as reset circuits, should be placed at least 1000 mils away from the edges of the board, especially from the edges of board interfaces.
Placement of Storage and High-Frequency Filtering Capacitors
- Principle: For circuits or devices with significant current changes (such as the input and output ends of power modules, fans, and relays), energy storage and high-frequency filtering capacitors should be placed nearby to reduce the loop area on large current loops.
Arrangement of Filtering Devices
- Principle: Filtering devices should be placed in parallel to prevent re-interference of the circuits after filtering.
Placement of High Radiation Devices
- Principle: High radiation devices such as crystals, oscillators, relays, and switch-mode power supplies should be kept at least 1000 mils away from the board interface connectors. This placement helps to direct interference outward or to couple the current on outgoing cables for external radiation.
PCB Routing Rules
Properly selecting components and circuit design are crucial, but the quality of Printed Circuit Board (PCB) routing also plays a significant role in electromagnetic compatibility (EMC). Since PCBs are inherent components of the system, enhancing EMC in PCB routing does not incur additional costs upon final product completion. It’s important to remember that poor PCB routing can exacerbate EMC issues rather than resolve them. In many cases, adding filters and components may not solve these problems, requiring a complete rerouting of the board. Therefore, developing good PCB routing habits is the most cost-effective method. Below are some general rules for PCB routing and strategies for designing power, ground, and signal lines.
Routing Separation
- Purpose: The goal of routing separation is to minimize crosstalk and noise coupling between adjacent lines within the same layer of the PCB. The 3W rule stipulates that all signals (clock, video, audio, reset, etc.) should be isolated from one another, edge to edge, as illustrated in Diagram 10. To further reduce magnetic coupling, a reference ground should be placed near critical signals to isolate the coupling noise generated on other signal lines.
Shielding and Shunt Lines
- Implementation: Setting up shunt and shielding lines is an effective way to isolate and protect critical signals, such as the system clock signal in a noisy environment. In Diagram 21, parallel or shielding lines within the PCB are routed along the path of critical signals. Shielding lines isolate the coupled magnetic flux generated by other signal lines and isolate the critical signals from coupling with other signal lines. The difference between shunt and shielding lines is that shunt lines do not need to be terminated (connected to the ground), but shielding lines must be connected to the ground at both ends. Shielding lines in multilayer PCBs should be grounded periodically to reduce coupling.
Power Line Design
- Recommendations: Depending on the current size of the printed circuit board, it is advisable to increase the width of power lines to reduce loop resistance. Additionally, aligning the direction of power lines and ground lines with the direction of data transfer can enhance noise immunity. If the power line routing is extended in single-sided or double-sided boards, decoupling capacitors should be added every 3000 mils, with a typical capacitance value of 10 uF + 1000 pF.
Ground Line Design
- Principles:
- (1) Separate digital and analog grounds. If a PCB has both logic (digital) and linear (analog) circuits, keeping their grounds separate is imperative to avoid interference. A single-point parallel grounding is recommended for low-frequency circuits to maintain a stable ground potential across the entire board. If practical routing presents challenges, a partial series before parallel grounding can be adopted to mitigate issues.
- For high-frequency circuits, a multi-point serial grounding is advisable. This method helps in reducing ground loop areas, which is crucial for minimizing radiated noise and susceptibility to external noise sources. The ground connections for these circuits should be as short as possible, and surrounding high-frequency components with a grid-like large area of ground plane can further shield them from interference.
- (2) Thicken ground lines. If ground lines are too thin, the ground potential will vary with current changes, reducing noise immunity. Therefore, they should be thickened to allow for three times the board’s current capacity. Ground lines should be at least 2-3mm wide.
- (3) Ground lines should form a closed loop. For PCBs consisting solely of digital circuits, configuring the ground layout in a closed loop can significantly enhance noise immunity. This layout helps in creating a controlled path for ground currents, reducing the potential for interference between different parts of the circuit.
Signal Line Design
- Guidelines: If the board has internal signal routing layers for critical signal lines, the clock and other critical signals should be routed internally, prioritizing optimal routing layers. Critical signal lines should also not cross partition areas, including vias and pad-induced reference plane gaps, as this would increase the signal loop area. Critical signal lines should also be at least 3H from the edge of the reference plane (where H is the distance from the line to the reference plane) to suppress edge radiation effects.
Summary
To effectively enhance electromagnetic compatibility (EMC) in PCB design, it’s essential to consider the routing and placement of various signal lines carefully:
- Separation of Signal Types: High-radiation signal lines, such as clock, bus, and RF lines, should be kept away from sensitive lines like reset, chip-select, and system control signals. This separation minimizes the risk of interference from high-radiation lines causing malfunctions in sensitive circuits or emitting unwanted radiation.
- Differential Signal Routing: Differential signal lines should be routed on the same layer, kept parallel, and matched in length to maintain consistent impedance and avoid crosstalk. This practice ensures that the common-mode impedance is matched, significantly enhancing their resistance to interference.
- Pre-Layout Planning: Careful planning of the return paths is crucial before actual routing begins. This proactive approach helps optimize the layout for EMC, offering the best chance to reduce electromagnetic interference (EMI) without incurring additional costs.
Overall, these strategies improve the system’s immunity to electromagnetic disturbances and prevent potential operational errors due to signal interference. Planning and adjusting routing strategies before physically laying out the board is a cost-effective method to achieve desired EMC outcomes, ensuring the system’s reliability and compliance with EMC standards.
